ERC32 and SIS
SPARC instruction simulator (SIS)
SIS(sis-3.0.5, 07-07-1999) is a SPARC instruction simulator developed at ESTEC. This simulator emulates an ERC32 system, containing the IU, FPU, MEC, up to 16 Mbyte ROM and up to 32 Mbyte RAM. Typical performance is 2 MIPS on a 400 MHz Pentium PC. Binaries for solaris-2.5 and Linux are available on the right menu.
ERC32 Cross Compilation System (ERC32CCS)
ERC32CCS-v2.0.7 is a GNU based cross-compiler system for ERC32 that consists of the following:
- GNU C/C++ compiler (egcs-1.1.2)
- GNAT Ada 95 compiler (gnat-3.11p)
- Linker, assembler, archiver etc. (binutils-2.9.1)
- Standalone C-library (newlib-1.8.1 from Cygnus)
- RTEMS real-time kernel with ERC32 support (rtems-4.0.0)
- ERC32 boot-prom utility (mkprom-1.2.7)
- Standalone ERC32 simulator (sis-3.0.5)
- GNU debugger with ERC32 simulator (gdb-4.17 + sis-3.0.5)
- DDD graphical user interace for gdb (ddd-3.1.3)
- Work-arounds for all FPU rev.B/C errors
The erc32ccs allows cross-compilation of single or multi-treaded C, C++ and Ada95 applications for ERC32. Using the gdb debugger, it is possible to perform source-level symbolic debugging, either on the simulator or on a remote target. Binary versions for solaris-2.5, and linux-2.0 can be found on the right menu. The compilation system includes full documentation, individual documents can be browsed from the right menu before downloading.
To get this software, please contact the ESA contact person.